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Application Note 9823
Appendix B HI5662EVAL2 Evaluation Board Schematic Diagrams
(Continued)
E1
E2
FB1
E7
E8
FB4
+5V AIN
+5V A
+5V DIN
+5V D
AGND
E3
+
E4
C46 C47
10 μ F 0.1 μ F
FB2
(ANALOG INPUT AND REFERENCE
VOLTAGE GENERATOR OP-AMPS,
BANDGAP REFERENCE)
DGND
E9
+
E10
C52 C53
10 μ F 0.1 μ F
FB5
(SAMPLE CLOCK
GENERATOR,
D F-F’s VIA LPF)
+5V A1IN
AGND
+
C48 C49
10 μ F 0.1 μ F
+5V A1
(A/D AV CC1 AND AV CC2 )
+5V D1IN
DGND
+
C54 C55
10 μ F 0.1 μ F
+5V D1
(A/D DV CC1
AND DV CC2 )
AGND AND DGND TIE TOGETHER
AT A SINGLE POINT WHERE
THE POWER SUPPLIES
ENTER THE PWB
E5
E6
FB3
E11 E12
FB6
-5V AIN
-5V A
+5V D2IN
+5V D2
AGND
+
C50 C51
10 μ F 0.1 μ F
(ANALOG INPUT AND REFERENCE
VOLTAGE GENERATOR OP-AMPS,
BANDGAP REFERENCE)
DGND
+
C56
10 μ F
C57
0.1 μ F
(+5V/+3V)
(A/D DV CC3 )
TP1
TP2
TP3
TP4
TP5
TP6
AGND
TEST
POINTS
3-11
FIGURE 20. ANALOG AND DIGITAL POWER SUPPLIES
DGND
TEST
POINTS
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